diff --git a/doc/rtf/refman.rtf b/doc/rtf/refman.rtf new file mode 100644 index 0000000..05030e6 --- /dev/null +++ b/doc/rtf/refman.rtf @@ -0,0 +1,1171 @@ +{\rtf1\ansi\ansicpg1252\uc1 \deff0\deflang1033\deflangfe1033 +{\fonttbl {\f0\froman\fcharset0\fprq2{\*\panose 02020603050405020304}Times New Roman;} +{\f1\fswiss\fcharset0\fprq2{\*\panose 020b0604020202020204}Arial;} +{\f2\fmodern\fcharset0\fprq1{\*\panose 02070309020205020404}Courier New;} +{\f3\froman\fcharset2\fprq2{\*\panose 05050102010706020507}Symbol;} +} +{\colortbl;\red0\green0\blue0;\red0\green0\blue255;\red0\green255\blue255;\red0\green255\blue0;\red255\green0\blue255;\red255\green0\blue0;\red255\green255\blue0;\red255\green255\blue255;\red0\green0\blue128;\red0\green128\blue128;\red0\green128\blue0;\red128\green0\blue128;\red128\green0\blue0;\red128\green128\blue0;\red128\green128\blue128;\red192\green192\blue192;} +{\stylesheet +{\widctlpar\adjustright \fs20\cgrid \snext0 Normal;} +{\paperw11900\paperh16840\margl1800\margr1800\margt1440\margb1440\gutter0\ltrsect} +{\s1\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs36\kerning36\cgrid \sbasedon0 \snext0 heading 1;} +{\s2\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs28\kerning28\cgrid \sbasedon0 \snext0 heading 2;} +{\s3\sb240\sa60\keepn\widctlpar\adjustright \b\f1\cgrid \sbasedon0 \snext0 heading 3;} +{\s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid \sbasedon0 \snext0 heading 4;}{\*\cs10 \additive Default Paragraph Font;} +{\s5\sb90\sa30\keepn\widctlpar\adjustright \b\f1\fs20\cgrid \sbasedon0 \snext0 heading 5;}{\*\cs10 \additive Default Paragraph Font;} +{\s15\qc\sb240\sa60\widctlpar\outlinelevel0\adjustright \b\f1\fs32\kerning28\cgrid \sbasedon0 \snext15 Title;} +{\s16\qc\sa60\widctlpar\outlinelevel1\adjustright \f1\cgrid \sbasedon0 \snext16 Subtitle;} +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid \sbasedon0 \snext17 BodyText;} +{\s18\widctlpar\fs22\cgrid \sbasedon0 \snext18 DenseText;} +{\s28\widctlpar\tqc\tx4320\tqr\tx8640\adjustright \fs20\cgrid \sbasedon0 \snext28 header;} +{\s29\widctlpar\tqc\tx4320\tqr\tx8640\qr\adjustright \fs20\cgrid \sbasedon0 \snext29 footer;} +{\s30\li360\sa60\sb120\keepn\widctlpar\adjustright \b\f1\fs20\cgrid \sbasedon0 \snext30 GroupHeader;} +{\s40\li0\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid \sbasedon0 \snext41 Code Example 0;} +{\s41\li360\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid \sbasedon0 \snext42 Code Example 1;} +{\s42\li720\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid \sbasedon0 \snext43 Code Example 2;} +{\s43\li1080\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid \sbasedon0 \snext44 Code Example 3;} +{\s44\li1440\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid \sbasedon0 \snext45 Code Example 4;} +{\s45\li1800\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid \sbasedon0 \snext46 Code Example 5;} +{\s46\li2160\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid \sbasedon0 \snext47 Code Example 6;} +{\s47\li2520\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid \sbasedon0 \snext48 Code Example 7;} +{\s48\li2880\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid \sbasedon0 \snext49 Code Example 8;} +{\s49\li3240\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid \sbasedon0 \snext49 Code Example 9;} +{\s50\li0\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid \sbasedon0 \snext51 List Continue 0;} +{\s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid \sbasedon0 \snext52 List Continue 1;} +{\s52\li720\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid \sbasedon0 \snext53 List Continue 2;} +{\s53\li1080\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid \sbasedon0 \snext54 List Continue 3;} +{\s54\li1440\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid \sbasedon0 \snext55 List Continue 4;} +{\s55\li1800\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid \sbasedon0 \snext56 List Continue 5;} +{\s56\li2160\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid \sbasedon0 \snext57 List Continue 6;} +{\s57\li2520\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid \sbasedon0 \snext58 List Continue 7;} +{\s58\li2880\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid \sbasedon0 \snext59 List Continue 8;} +{\s59\li3240\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid \sbasedon0 \snext59 List Continue 9;} +{\s60\li0\widctlpar\ql\adjustright \fs20\cgrid \sbasedon0 \snext61 DescContinue 0;} +{\s61\li360\widctlpar\ql\adjustright \fs20\cgrid \sbasedon0 \snext62 DescContinue 1;} +{\s62\li720\widctlpar\ql\adjustright \fs20\cgrid \sbasedon0 \snext63 DescContinue 2;} +{\s63\li1080\widctlpar\ql\adjustright \fs20\cgrid \sbasedon0 \snext64 DescContinue 3;} +{\s64\li1440\widctlpar\ql\adjustright \fs20\cgrid \sbasedon0 \snext65 DescContinue 4;} +{\s65\li1800\widctlpar\ql\adjustright \fs20\cgrid \sbasedon0 \snext66 DescContinue 5;} +{\s66\li2160\widctlpar\ql\adjustright \fs20\cgrid \sbasedon0 \snext67 DescContinue 6;} +{\s67\li2520\widctlpar\ql\adjustright \fs20\cgrid \sbasedon0 \snext68 DescContinue 7;} +{\s68\li2880\widctlpar\ql\adjustright \fs20\cgrid \sbasedon0 \snext69 DescContinue 8;} +{\s69\li3240\widctlpar\ql\adjustright \fs20\cgrid \sbasedon0 \snext69 DescContinue 9;} +{\s70\li0\sa30\sb30\widctlpar\tqr\tldot\tx8640\adjustright \fs20\cgrid \sbasedon0 \snext81 LatexTOC 0;} +{\s71\li360\sa27\sb27\widctlpar\tqr\tldot\tx8640\adjustright \fs20\cgrid \sbasedon0 \snext82 LatexTOC 1;} +{\s72\li720\sa24\sb24\widctlpar\tqr\tldot\tx8640\adjustright \fs20\cgrid \sbasedon0 \snext83 LatexTOC 2;} +{\s73\li1080\sa21\sb21\widctlpar\tqr\tldot\tx8640\adjustright \fs20\cgrid \sbasedon0 \snext84 LatexTOC 3;} +{\s74\li1440\sa18\sb18\widctlpar\tqr\tldot\tx8640\adjustright \fs20\cgrid \sbasedon0 \snext85 LatexTOC 4;} +{\s75\li1800\sa15\sb15\widctlpar\tqr\tldot\tx8640\adjustright \fs20\cgrid \sbasedon0 \snext86 LatexTOC 5;} +{\s76\li2160\sa12\sb12\widctlpar\tqr\tldot\tx8640\adjustright \fs20\cgrid \sbasedon0 \snext87 LatexTOC 6;} +{\s77\li2520\sa9\sb9\widctlpar\tqr\tldot\tx8640\adjustright \fs20\cgrid \sbasedon0 \snext88 LatexTOC 7;} +{\s78\li2880\sa6\sb6\widctlpar\tqr\tldot\tx8640\adjustright \fs20\cgrid \sbasedon0 \snext89 LatexTOC 8;} +{\s79\li3240\sa3\sb3\widctlpar\tqr\tldot\tx8640\adjustright \fs20\cgrid \sbasedon0 \snext89 LatexTOC 9;} +{\s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid \sbasedon0 \snext81 \sautoupd List Bullet 0;} +{\s81\fi-360\li720\widctlpar\jclisttab\tx720{\*\pn \pnlvlbody\ilvl0\ls2\pnrnot0\pndec }\ls2\adjustright \fs20\cgrid \sbasedon0 \snext82 \sautoupd List Bullet 1;} +{\s82\fi-360\li1080\widctlpar\jclisttab\tx1080{\*\pn \pnlvlbody\ilvl0\ls3\pnrnot0\pndec }\ls3\adjustright \fs20\cgrid \sbasedon0 \snext83 \sautoupd List Bullet 2;} +{\s83\fi-360\li1440\widctlpar\jclisttab\tx1440{\*\pn \pnlvlbody\ilvl0\ls4\pnrnot0\pndec }\ls4\adjustright \fs20\cgrid \sbasedon0 \snext84 \sautoupd List Bullet 3;} +{\s84\fi-360\li1800\widctlpar\jclisttab\tx1800{\*\pn \pnlvlbody\ilvl0\ls5\pnrnot0\pndec }\ls5\adjustright \fs20\cgrid \sbasedon0 \snext85 \sautoupd List Bullet 4;} +{\s85\fi-360\li2160\widctlpar\jclisttab\tx2160{\*\pn \pnlvlbody\ilvl0\ls6\pnrnot0\pndec }\ls6\adjustright \fs20\cgrid \sbasedon0 \snext86 \sautoupd List Bullet 5;} +{\s86\fi-360\li2520\widctlpar\jclisttab\tx2520{\*\pn \pnlvlbody\ilvl0\ls7\pnrnot0\pndec }\ls7\adjustright \fs20\cgrid \sbasedon0 \snext87 \sautoupd List Bullet 6;} +{\s87\fi-360\li2880\widctlpar\jclisttab\tx2880{\*\pn \pnlvlbody\ilvl0\ls8\pnrnot0\pndec }\ls8\adjustright \fs20\cgrid \sbasedon0 \snext88 \sautoupd List Bullet 7;} +{\s88\fi-360\li3240\widctlpar\jclisttab\tx3240{\*\pn \pnlvlbody\ilvl0\ls9\pnrnot0\pndec }\ls9\adjustright \fs20\cgrid \sbasedon0 \snext89 \sautoupd List Bullet 8;} +{\s89\fi-360\li3600\widctlpar\jclisttab\tx3600{\*\pn \pnlvlbody\ilvl0\ls10\pnrnot0\pndec }\ls10\adjustright \fs20\cgrid \sbasedon0 \snext89 \sautoupd List Bullet 9;} +{\s90\fi-360\li360\widctlpar\fs20\cgrid \sbasedon0 \snext91 \sautoupd List Enum 0;} +{\s91\fi-360\li720\widctlpar\fs20\cgrid \sbasedon0 \snext92 \sautoupd List Enum 1;} +{\s92\fi-360\li1080\widctlpar\fs20\cgrid \sbasedon0 \snext93 \sautoupd List Enum 2;} +{\s93\fi-360\li1440\widctlpar\fs20\cgrid \sbasedon0 \snext94 \sautoupd List Enum 3;} +{\s94\fi-360\li1800\widctlpar\fs20\cgrid \sbasedon0 \snext95 \sautoupd List Enum 4;} +{\s95\fi-360\li2160\widctlpar\fs20\cgrid \sbasedon0 \snext96 \sautoupd List Enum 5;} +{\s96\fi-360\li2520\widctlpar\fs20\cgrid \sbasedon0 \snext96 \sautoupd List Enum 5;} +{\s97\fi-360\li2880\widctlpar\fs20\cgrid \sbasedon0 \snext98 \sautoupd List Enum 7;} +{\s98\fi-360\li3240\widctlpar\fs20\cgrid \sbasedon0 \snext99 \sautoupd List Enum 8;} +{\s99\fi-360\li3600\widctlpar\fs20\cgrid \sbasedon0 \snext99 \sautoupd List Enum 9;} +} +{\info +{\title {\comment PCF8574_library {\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +0.9.0 \par +}}PCF8574_library} +{\comment Generated byDoxgyen. } +{\creatim \yr2017\mo11\dy13\hr21\min59\sec6} +}\pard\plain +\sectd\pgnlcrm +{\footer \s29\widctlpar\tqc\tx4320\tqr\tx8640\qr\adjustright \fs20\cgrid {\chpgn}} +\pard\plain \s16\qc\sa60\widctlpar\outlinelevel1\adjustright \f1\cgrid +\vertalc\qc\par\par\par\par\par\par\par +\pard\plain \s15\qc\sb240\sa60\widctlpar\outlinelevel0\adjustright \b\f1\fs32\kerning28\cgrid +{\field\fldedit {\*\fldinst TITLE \\*MERGEFORMAT}{\fldrslt PCF8574_library}}\par +\pard\plain \s16\qc\sa60\widctlpar\outlinelevel1\adjustright \f1\cgrid +\par +\par\par\par\par\par\par\par\par\par\par\par\par +\pard\plain \s16\qc\sa60\widctlpar\outlinelevel1\adjustright \f1\cgrid +{\field\fldedit {\*\fldinst AUTHOR \\*MERGEFORMAT}{\fldrslt AUTHOR}}\par +Version 0.9.0\par{\field\fldedit {\*\fldinst CREATEDATE \\*MERGEFORMAT}{\fldrslt Mon Nov 13 2017 }}\par +\page\page\vertalt +\pard\plain +\s1\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs36\kerning36\cgrid Table of Contents\par +\pard\plain \par +{\field\fldedit {\*\fldinst TOC \\f \\*MERGEFORMAT}{\fldrslt Table of contents}}\par +\pard\plain +\sect \sbkpage \pgndec \pgnrestart +\sect \sectd \sbknone +{\footer \s29\widctlpar\tqc\tx4320\tqr\tx8640\qr\adjustright \fs20\cgrid {\chpgn}} + +\pard\plain \sect\sbkpage +\s1\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs36\kerning36\cgrid +Thermistor library\par \pard\plain +{\tc \v Thermistor library} +{ +\pard\plain \s17\sa60\sb30\widctlpar\qj \fs22\cgrid {\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +MIT license written by Renzo Mischianti \par +}} + +\pard\plain \sect\sbkpage +\s1\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs36\kerning36\cgrid +README{\tc \v README}\par \pard\plain +{\bkmkstart AAAAAAAABV} +{\bkmkend AAAAAAAABV} +{ +\pard\plain \s17\sa60\sb30\widctlpar\qj \fs22\cgrid {\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Library to use i2c analog IC with arduino and esp8266. Can read and write digital value with only 2 wire (perfect for ESP-01).\par +Tutorial:\par +To download. click the DOWNLOADS button in the top right corner, rename the uncompressed folder {\b PCF8574}. Check that the {\b PCF8574} folder contains {\f2 {\b PCF8574}\\\\.cpp} and {\f2 {\b PCF8574.h}} . Place the DHT library folder your {\f2 /libraries/} folder. You may need to create the libraries subfolder if its your first library. Restart the IDE.\par +{\pard\plain \s3\sb240\sa60\keepn\widctlpar\adjustright \b\f1\cgrid {\tc\tcl3 Reef complete {\b PCF8574} digital input and output expander with i2c bus.} \par} +I try to simplify the use of this IC, with a minimal set of operation.\par +Constructor: you must pas the address of i2c (to check the adress use this guide {\f2 I2cScanner}) { +\par +\pard\plain \s40\li0\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid PCF8574(uint8_t address);\par +} + for esp8266 if you want specify SDA e SCL pin use this:\par +{ +\par +\pard\plain \s40\li0\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid PCF8574(uint8_t address, uint8_t sda, uint8_t scl);\par +} + You must set input/output mode: { +\par +\pard\plain \s40\li0\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid pcf8574.pinMode(P0, OUTPUT);\par +pcf8574.pinMode(P1, INPUT);\par +pcf8574.pinMode(P2, INPUT);\par +} +\par +then IC as you can see in the image have 8 digital input/output:\par +So to read all analog input in one trasmission you can do (even if I use a 10millis debounce time to prevent too much read from i2c): { +\par +\pard\plain \s40\li0\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid PCF8574::DigitalInput di = PCF8574.digitalReadAll();\par +Serial.print(di.p0);\par +Serial.print(" - ");\par +Serial.print(di.p1);\par +Serial.print(" - ");\par +Serial.print(di.p2);\par +Serial.print(" - ");\par +Serial.println(di.p3);\par +} +\par +if you want read a single input:\par +{ +\par +\pard\plain \s40\li0\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid int p1Digital = PCF8574.digitalRead(P1); // read P1\par +} +\par +If you want write a digital value you must do: { +\par +\pard\plain \s40\li0\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid PCF8574.digitalWrite(P1, HIGH);\par +} + or: { +\par +\pard\plain \s40\li0\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid PCF8574.digitalWrite(P1, LOW);\par +} +\par +You can also use interrupt pin: You must initialize the pin and the function to call when interrupt raised from {\b PCF8574} { +\par +\pard\plain \s40\li0\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid // Function interrupt\par +void keyPressedOnPCF8574();\par +\par +// Set i2c address\par +PCF8574 pcf8574(0x39, ARDUINO_UNO_INTERRUPT_PIN, keyPressedOnPCF8574);\par +} + Remember you can't use Serial or Wire on interrupt function.\par +The better way is to set only a variable to read on loop: { +\par +\pard\plain \s40\li0\widctlpar\adjustright \shading1000\cbpat8 \f2\fs16\cgrid void keyPressedOnPCF8574()\{\par + // Interrupt called (No Serial no read no wire in this function, and DEBUG disabled on PCF library)\par + keyPressed = true;\par +\}\par +} +\par +For the examples I use this wire schema on breadboard: \par +}} + +\pard\plain \sect\sbkpage +\s1\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs36\kerning36\cgrid +Class Index\par \pard\plain +{\tc \v Class Index} +\pard\plain \s2\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs28\kerning28\cgrid +Class List\par \pard\plain +{ +\pard\plain \s17\sa60\sb30\widctlpar\qj \fs22\cgrid Here are the classes, structs, unions and interfaces with brief descriptions:} +{ +\par +\pard\plain \s71\li360\sa27\sb27\widctlpar\tqr\tldot\tx8640\adjustright \fs20\cgrid +{\b {\b PCF8574::DigitalInput} } \tab {\field\fldedit {\*\fldinst PAGEREF AAAAAAAABM \\*MERGEFORMAT}{\fldrslt pagenum}} +\par +{\b {\b PCF8574} } \tab {\field\fldedit {\*\fldinst PAGEREF AAAAAAAAAP \\*MERGEFORMAT}{\fldrslt pagenum}} +\par +\par} +\pard\plain \sect\sbkpage +\s1\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs36\kerning36\cgrid +File Index\par \pard\plain +{\tc \v File Index} +\pard\plain \s2\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs28\kerning28\cgrid +File List\par \pard\plain +{ +\pard\plain \s17\sa60\sb30\widctlpar\qj \fs22\cgrid Here is a list of all files with brief descriptions:} +{ +\par +\pard\plain \s71\li360\sa27\sb27\widctlpar\tqr\tldot\tx8640\adjustright \fs20\cgrid +{\b {\b PCF8574.cpp} } \tab {\field\fldedit {\*\fldinst PAGEREF AAAAAAAAAA \\*MERGEFORMAT}{\fldrslt pagenum}} +\par +{\b {\b PCF8574.h} } \tab {\field\fldedit {\*\fldinst PAGEREF AAAAAAAAAB \\*MERGEFORMAT}{\fldrslt pagenum}} +\par +\par} +\pard\plain \sect\sbkpage +\s1\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs36\kerning36\cgrid +Class Documentation{\tc \v Class Documentation} +\par \pard\plain +\pard\plain \s2\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs28\kerning28\cgrid +PCF8574::DigitalInput Struct Reference\par \pard\plain +{\tc\tcl2 \v PCF8574::DigitalInput} +{\xe \v PCF8574::DigitalInput} +{\bkmkstart AAAAAAAABM} +{\bkmkend AAAAAAAABM} +\par +{ +{\f2 #include }}\par +\pard\plain \s3\sb240\sa60\keepn\widctlpar\adjustright \b\f1\cgrid +Public Attributes\par +\pard\plain + +{ +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +uint8_t {\b p0}\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +uint8_t {\b p1}\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +uint8_t {\b p2}\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +uint8_t {\b p3}\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +uint8_t {\b p4}\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +uint8_t {\b p5}\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +uint8_t {\b p6}\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +uint8_t {\b p7}\par +} +{\pard\widctlpar\brdrb\brdrs\brdrw5\brsp20 \adjustright \par} +\pard\plain \s3\sb240\sa60\keepn\widctlpar\adjustright \b\f1\cgrid +Member Data Documentation\par +\pard\plain +{\xe \v p0\:PCF8574::DigitalInput} +{\xe \v PCF8574::DigitalInput\:p0} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +uint8_t PCF8574::DigitalInput::p0}} +\par +{\bkmkstart AAAAAAAABN} +{\bkmkend AAAAAAAABN} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v p1\:PCF8574::DigitalInput} +{\xe \v PCF8574::DigitalInput\:p1} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +uint8_t PCF8574::DigitalInput::p1}} +\par +{\bkmkstart AAAAAAAABO} +{\bkmkend AAAAAAAABO} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v p2\:PCF8574::DigitalInput} +{\xe \v PCF8574::DigitalInput\:p2} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +uint8_t PCF8574::DigitalInput::p2}} +\par +{\bkmkstart AAAAAAAABP} +{\bkmkend AAAAAAAABP} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v p3\:PCF8574::DigitalInput} +{\xe \v PCF8574::DigitalInput\:p3} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +uint8_t PCF8574::DigitalInput::p3}} +\par +{\bkmkstart AAAAAAAABQ} +{\bkmkend AAAAAAAABQ} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v p4\:PCF8574::DigitalInput} +{\xe \v PCF8574::DigitalInput\:p4} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +uint8_t PCF8574::DigitalInput::p4}} +\par +{\bkmkstart AAAAAAAABR} +{\bkmkend AAAAAAAABR} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v p5\:PCF8574::DigitalInput} +{\xe \v PCF8574::DigitalInput\:p5} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +uint8_t PCF8574::DigitalInput::p5}} +\par +{\bkmkstart AAAAAAAABS} +{\bkmkend AAAAAAAABS} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v p6\:PCF8574::DigitalInput} +{\xe \v PCF8574::DigitalInput\:p6} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +uint8_t PCF8574::DigitalInput::p6}} +\par +{\bkmkstart AAAAAAAABT} +{\bkmkend AAAAAAAABT} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v p7\:PCF8574::DigitalInput} +{\xe \v PCF8574::DigitalInput\:p7} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +uint8_t PCF8574::DigitalInput::p7}} +\par +{\bkmkstart AAAAAAAABU} +{\bkmkend AAAAAAAABU} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\pard\widctlpar\brdrb\brdrs\brdrw5\brsp20 \adjustright \par} +The documentation for this struct was generated from the following file:{\par +\pard\plain \s81\fi-360\li720\widctlpar\jclisttab\tx720{\*\pn \pnlvlbody\ilvl0\ls2\pnrnot0\pndec }\ls2\adjustright \fs20\cgrid +{\b PCF8574.h}\par +}\par \pard\plain + +\pard\plain \sect\sbkpage +\s2\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs28\kerning28\cgrid +\pard\plain \s2\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs28\kerning28\cgrid +PCF8574 Class Reference\par \pard\plain +{\tc\tcl2 \v PCF8574} +{\xe \v PCF8574} +{\bkmkstart AAAAAAAAAP} +{\bkmkend AAAAAAAAAP} +\par +{ +{\f2 #include }}\par +\pard\plain \s3\sb240\sa60\keepn\widctlpar\adjustright \b\f1\cgrid +Classes\par +\pard\plain + +{ +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +struct {\b DigitalInput}\par +} +\pard\plain \s3\sb240\sa60\keepn\widctlpar\adjustright \b\f1\cgrid +Public Member Functions\par +\pard\plain + +{ +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +{\b PCF8574} (uint8_t address)\par +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid {\i {\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Constructor. }{ +}\par +}} +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +{\b PCF8574} (uint8_t address, uint8_t sda, uint8_t scl)\par +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid {\i {\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Constructor. }{ +}\par +}} +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +{\b PCF8574} (uint8_t address, uint8_t interruptPin, void(*interruptFunction)())\par +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid {\i {\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Construcor. }{ +}\par +}} +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +{\b PCF8574} (uint8_t address, uint8_t sda, uint8_t scl, uint8_t interruptPin, void(*interruptFunction)())\par +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid {\i {\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Constructor. }{ +}\par +}} +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +void {\b begin} ()\par +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid {\i {\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +wake up i2c controller }{ +}\par +}} +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +void {\b pinMode} (uint8_t pin, uint8_t mode)\par +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid {\i {\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Set if fin is OUTPUT or INPUT. }{ +}\par +}} +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +void {\b readBuffer} (bool force=true)\par +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid {\i {\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Read value from i2c and bufferize it. }{ +}\par +}} +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +uint8_t {\b digitalRead} (uint8_t pin)\par +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid {\i {\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Read value of specified pin Debounce read more fast than 10millis, non managed for interrupt mode. }{ +}\par +}} +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +{\b DigitalInput} {\b digitalReadAll} (void)\par +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid {\i {\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Read value of all INPUT pin Debounce read more fast than 10millis, non managed for interrupt mode. }{ +}\par +}} +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +void {\b digitalWrite} (uint8_t pin, uint8_t value)\par +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid {\i {\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Write on pin. }{ +}\par +}} +} +\pard\plain \s3\sb240\sa60\keepn\widctlpar\adjustright \b\f1\cgrid +Public Attributes\par +\pard\plain + +{ +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +struct {\b PCF8574::DigitalInput} {\b digitalInput}\par +} +\pard\plain \s3\sb240\sa60\keepn\widctlpar\adjustright \b\f1\cgrid +Private Attributes\par +\pard\plain + +{ +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +uint8_t {\b _address}\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +uint8_t {\b _sda} = SDA\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +uint8_t {\b _scl} = SCL\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +bool {\b _usingInterrupt} = false\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +uint8_t {\b _interruptPin} = 2\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +void(* {\b _interruptFunction} )()\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +byte {\b writeMode} = B00000000\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +byte {\b readMode} = B00000000\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +byte {\b byteBuffered} = B00000000\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +unsigned long {\b lastReadMillis} = 0\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +byte {\b writeByteBuffered} = B00000000\par +} +{\pard\widctlpar\brdrb\brdrs\brdrw5\brsp20 \adjustright \par} +\pard\plain \s3\sb240\sa60\keepn\widctlpar\adjustright \b\f1\cgrid +Constructor & Destructor Documentation\par +\pard\plain +{\xe \v PCF8574\:PCF8574} +{\xe \v PCF8574\:PCF8574} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +PCF8574::PCF8574 (uint8_t {\i address})}} +\par +{\bkmkstart AAAAAAAAAQ} +{\bkmkend AAAAAAAAAQ} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +\par +{ +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Constructor. }}\par +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +{\par +{\s5\sb90\sa30\keepn\widctlpar\adjustright \b\f1\fs20\cgrid +Parameters:\par} +\pard\plain \s61\li360\widctlpar\ql\adjustright \fs20\cgrid \trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i address} \cell }{i2c address \cell } +{\row } +} +}} +{\xe \v PCF8574\:PCF8574} +{\xe \v PCF8574\:PCF8574} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +PCF8574::PCF8574 (uint8_t {\i address}, uint8_t {\i sda}, uint8_t {\i scl})}} +\par +{\bkmkstart AAAAAAAAAR} +{\bkmkend AAAAAAAAAR} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +\par +{ +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Constructor. }}\par +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +{\par +{\s5\sb90\sa30\keepn\widctlpar\adjustright \b\f1\fs20\cgrid +Parameters:\par} +\pard\plain \s61\li360\widctlpar\ql\adjustright \fs20\cgrid \trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i address} \cell }{i2c address \cell } +{\row } +\trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i sda} \cell }{sda pin \cell } +{\row } +\trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i scl} \cell }{scl pin \cell } +{\row } +} +}} +{\xe \v PCF8574\:PCF8574} +{\xe \v PCF8574\:PCF8574} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +PCF8574::PCF8574 (uint8_t {\i address}, uint8_t {\i interruptPin}, void(*)() {\i interruptFunction})}} +\par +{\bkmkstart AAAAAAAAAS} +{\bkmkend AAAAAAAAAS} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +\par +{ +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Construcor. }}\par +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +{\par +{\s5\sb90\sa30\keepn\widctlpar\adjustright \b\f1\fs20\cgrid +Parameters:\par} +\pard\plain \s61\li360\widctlpar\ql\adjustright \fs20\cgrid \trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i address} \cell }{i2c address \cell } +{\row } +\trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i interruptPin} \cell }{pin to set interrupt \cell } +{\row } +\trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i interruptFunction} \cell }{function to call when interrupt raised \cell } +{\row } +} +}} +{\xe \v PCF8574\:PCF8574} +{\xe \v PCF8574\:PCF8574} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +PCF8574::PCF8574 (uint8_t {\i address}, uint8_t {\i sda}, uint8_t {\i scl}, uint8_t {\i interruptPin}, void(*)() {\i interruptFunction})}} +\par +{\bkmkstart AAAAAAAAAT} +{\bkmkend AAAAAAAAAT} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +\par +{ +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Constructor. }}\par +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +{\par +{\s5\sb90\sa30\keepn\widctlpar\adjustright \b\f1\fs20\cgrid +Parameters:\par} +\pard\plain \s61\li360\widctlpar\ql\adjustright \fs20\cgrid \trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i address} \cell }{i2c address \cell } +{\row } +\trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i sda} \cell }{sda pin \cell } +{\row } +\trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i scl} \cell }{scl pin \cell } +{\row } +\trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i interruptPin} \cell }{pin to set interrupt \cell } +{\row } +\trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i interruptFunction} \cell }{function to call when interrupt raised \cell } +{\row } +} +}} +{\pard\widctlpar\brdrb\brdrs\brdrw5\brsp20 \adjustright \par} +\pard\plain \s3\sb240\sa60\keepn\widctlpar\adjustright \b\f1\cgrid +Member Function Documentation\par +\pard\plain +{\xe \v begin\:PCF8574} +{\xe \v PCF8574\:begin} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +void PCF8574::begin ()}} +\par +{\bkmkstart AAAAAAAAAU} +{\bkmkend AAAAAAAAAU} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +\par +{ +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +wake up i2c controller }}\par +} +{\xe \v digitalRead\:PCF8574} +{\xe \v PCF8574\:digitalRead} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +uint8_t PCF8574::digitalRead (uint8_t {\i pin})}} +\par +{\bkmkstart AAAAAAAAAV} +{\bkmkend AAAAAAAAAV} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +\par +{ +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Read value of specified pin Debounce read more fast than 10millis, non managed for interrupt mode. }}\par +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +{\par +{\s5\sb90\sa30\keepn\widctlpar\adjustright \b\f1\fs20\cgrid +Parameters:\par} +\pard\plain \s61\li360\widctlpar\ql\adjustright \fs20\cgrid \trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i pin} \cell }{\cell } +{\row } +} +{{\s5\sb90\sa30\keepn\widctlpar\adjustright \b\f1\fs20\cgrid +Returns:\par}\pard\plain \s62\li720\widctlpar\ql\adjustright \fs20\cgrid \par +}}} +{\xe \v digitalReadAll\:PCF8574} +{\xe \v PCF8574\:digitalReadAll} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +{\b PCF8574::DigitalInput} PCF8574::digitalReadAll (void )}} +\par +{\bkmkstart AAAAAAAAAW} +{\bkmkend AAAAAAAAAW} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +\par +{ +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Read value of all INPUT pin Debounce read more fast than 10millis, non managed for interrupt mode. }}\par +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +\par +{{\s5\sb90\sa30\keepn\widctlpar\adjustright \b\f1\fs20\cgrid +Returns:\par}\pard\plain \s62\li720\widctlpar\ql\adjustright \fs20\cgrid \par +}}} +{\xe \v digitalWrite\:PCF8574} +{\xe \v PCF8574\:digitalWrite} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +void PCF8574::digitalWrite (uint8_t {\i pin}, uint8_t {\i value})}} +\par +{\bkmkstart AAAAAAAAAX} +{\bkmkend AAAAAAAAAX} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +\par +{ +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Write on pin. }}\par +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +{\par +{\s5\sb90\sa30\keepn\widctlpar\adjustright \b\f1\fs20\cgrid +Parameters:\par} +\pard\plain \s61\li360\widctlpar\ql\adjustright \fs20\cgrid \trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i pin} \cell }{\cell } +{\row } +\trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i value} \cell }{\cell } +{\row } +} +}} +{\xe \v pinMode\:PCF8574} +{\xe \v PCF8574\:pinMode} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +void PCF8574::pinMode (uint8_t {\i pin}, uint8_t {\i mode})}} +\par +{\bkmkstart AAAAAAAAAY} +{\bkmkend AAAAAAAAAY} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +\par +{ +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Set if fin is OUTPUT or INPUT. }}\par +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +{\par +{\s5\sb90\sa30\keepn\widctlpar\adjustright \b\f1\fs20\cgrid +Parameters:\par} +\pard\plain \s61\li360\widctlpar\ql\adjustright \fs20\cgrid \trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i pin} \cell }{pin to set \cell } +{\row } +\trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i mode} \cell }{mode, supported only INPUT or OUTPUT (to semplify) \cell } +{\row } +} +}} +{\xe \v readBuffer\:PCF8574} +{\xe \v PCF8574\:readBuffer} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +void PCF8574::readBuffer (bool {\i force} = {\f2 true})}} +\par +{\bkmkstart AAAAAAAAAZ} +{\bkmkend AAAAAAAAAZ} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +\par +{ +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +Read value from i2c and bufferize it. }}\par +{\s17\sa60\sb30\widctlpar\qj \fs22\cgrid +{\par +{\s5\sb90\sa30\keepn\widctlpar\adjustright \b\f1\fs20\cgrid +Parameters:\par} +\pard\plain \s61\li360\widctlpar\ql\adjustright \fs20\cgrid \trowd \trgaph108\trleft426\tblind426\trbrdrt\brdrs\brdrw10\brdrcf15 \trbrdrl\brdrs\brdrw10\brdrcf15 \trbrdrb\brdrs\brdrw10\brdrcf15 \trbrdrr\brdrs\brdrw10\brdrcf15 \trbrdrh\brdrs\brdrw10\brdrcf15 \trbrdrv\brdrs\brdrw10\brdrcf15 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx2187 +\clvertalt\clbrdrt\brdrs\brdrw10\brdrcf15 \clbrdrl\brdrs\brdrw10\brdrcf15 \clbrdrb\brdrs\brdrw10\brdrcf15 \clbrdrr \brdrs\brdrw10\brdrcf15 \cltxlrtb \cellx8748 +\pard \widctlpar\intbl\adjustright +{{\i force} \cell }{\cell } +{\row } +} +}} +{\pard\widctlpar\brdrb\brdrs\brdrw5\brsp20 \adjustright \par} +\pard\plain \s3\sb240\sa60\keepn\widctlpar\adjustright \b\f1\cgrid +Member Data Documentation\par +\pard\plain +{\xe \v _address\:PCF8574} +{\xe \v PCF8574\:_address} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +uint8_t PCF8574::_address{\f2 [private]}}} +\par +{\bkmkstart AAAAAAAABA} +{\bkmkend AAAAAAAABA} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v _interruptFunction\:PCF8574} +{\xe \v PCF8574\:_interruptFunction} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +void(* PCF8574::_interruptFunction) (){\f2 [inline]}, {\f2 [private]}}} +\par +{\bkmkstart AAAAAAAABB} +{\bkmkend AAAAAAAABB} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v _interruptPin\:PCF8574} +{\xe \v PCF8574\:_interruptPin} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +uint8_t PCF8574::_interruptPin = 2{\f2 [private]}}} +\par +{\bkmkstart AAAAAAAABC} +{\bkmkend AAAAAAAABC} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v _scl\:PCF8574} +{\xe \v PCF8574\:_scl} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +uint8_t PCF8574::_scl = SCL{\f2 [private]}}} +\par +{\bkmkstart AAAAAAAABD} +{\bkmkend AAAAAAAABD} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v _sda\:PCF8574} +{\xe \v PCF8574\:_sda} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +uint8_t PCF8574::_sda = SDA{\f2 [private]}}} +\par +{\bkmkstart AAAAAAAABE} +{\bkmkend AAAAAAAABE} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v _usingInterrupt\:PCF8574} +{\xe \v PCF8574\:_usingInterrupt} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +bool PCF8574::_usingInterrupt = false{\f2 [private]}}} +\par +{\bkmkstart AAAAAAAABF} +{\bkmkend AAAAAAAABF} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v byteBuffered\:PCF8574} +{\xe \v PCF8574\:byteBuffered} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +byte PCF8574::byteBuffered = B00000000{\f2 [private]}}} +\par +{\bkmkstart AAAAAAAABG} +{\bkmkend AAAAAAAABG} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v digitalInput\:PCF8574} +{\xe \v PCF8574\:digitalInput} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +struct {\b PCF8574::DigitalInput} PCF8574::digitalInput}} +\par +{\bkmkstart AAAAAAAABH} +{\bkmkend AAAAAAAABH} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v lastReadMillis\:PCF8574} +{\xe \v PCF8574\:lastReadMillis} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +unsigned long PCF8574::lastReadMillis = 0{\f2 [private]}}} +\par +{\bkmkstart AAAAAAAABI} +{\bkmkend AAAAAAAABI} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v readMode\:PCF8574} +{\xe \v PCF8574\:readMode} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +byte PCF8574::readMode = B00000000{\f2 [private]}}} +\par +{\bkmkstart AAAAAAAABJ} +{\bkmkend AAAAAAAABJ} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v writeByteBuffered\:PCF8574} +{\xe \v PCF8574\:writeByteBuffered} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +byte PCF8574::writeByteBuffered = B00000000{\f2 [private]}}} +\par +{\bkmkstart AAAAAAAABK} +{\bkmkend AAAAAAAABK} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v writeMode\:PCF8574} +{\xe \v PCF8574\:writeMode} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +byte PCF8574::writeMode = B00000000{\f2 [private]}}} +\par +{\bkmkstart AAAAAAAABL} +{\bkmkend AAAAAAAABL} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\pard\widctlpar\brdrb\brdrs\brdrw5\brsp20 \adjustright \par} +The documentation for this class was generated from the following files:{\par +\pard\plain \s81\fi-360\li720\widctlpar\jclisttab\tx720{\*\pn \pnlvlbody\ilvl0\ls2\pnrnot0\pndec }\ls2\adjustright \fs20\cgrid +{\b PCF8574.h}\par +\pard\plain \s81\fi-360\li720\widctlpar\jclisttab\tx720{\*\pn \pnlvlbody\ilvl0\ls2\pnrnot0\pndec }\ls2\adjustright \fs20\cgrid +{\b PCF8574.cpp}\par +} +\pard\plain \sect\sbkpage +\s1\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs36\kerning36\cgrid +File Documentation{\tc \v File Documentation} +\par \pard\plain +\pard\plain \s2\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs28\kerning28\cgrid +PCF8574.cpp File Reference\par \pard\plain +{\tc\tcl2 \v PCF8574.cpp} +{\xe \v PCF8574.cpp} +{\bkmkstart AAAAAAAAAA} +{\bkmkend AAAAAAAAAA} +{ +\pard\plain \s18\widctlpar\fs22\cgrid {\f2 #include "PCF8574.h"}\par +{\f2 #include "Wire.h"}\par +} +\par \pard\plain + +\pard\plain \sect\sbkpage +\s2\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs28\kerning28\cgrid +\pard\plain \s2\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs28\kerning28\cgrid +PCF8574.h File Reference\par \pard\plain +{\tc\tcl2 \v PCF8574.h} +{\xe \v PCF8574.h} +{\bkmkstart AAAAAAAAAB} +{\bkmkend AAAAAAAAAB} +{ +\pard\plain \s18\widctlpar\fs22\cgrid {\f2 #include "Wire.h"}\par +{\f2 #include "WProgram.h"}\par +{\f2 #include }\par +} +\pard\plain \s3\sb240\sa60\keepn\widctlpar\adjustright \b\f1\cgrid +Classes\par +\pard\plain + +{ +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +class {\b PCF8574}\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +struct {\b PCF8574::DigitalInput}\par +} +\pard\plain \s3\sb240\sa60\keepn\widctlpar\adjustright \b\f1\cgrid +Macros\par +\pard\plain + +{ +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +#define {\b DEBUG_PRINTER}\~ Serial\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +#define {\b DEBUG_PRINT}(...)\~ \{\}\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +#define {\b DEBUG_PRINTLN}(...)\~ \{\}\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +#define {\b READ_ELAPSED_TIME}\~ 10\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +#define {\b P0}\~ 0\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +#define {\b P1}\~ 1\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +#define {\b P2}\~ 2\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +#define {\b P3}\~ 3\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +#define {\b P4}\~ 4\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +#define {\b P5}\~ 5\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +#define {\b P6}\~ 6\par +\pard\plain \s80\fi-360\li360\widctlpar\jclisttab\tx360{\*\pn \pnlvlbody\ilvl0\ls1\pnrnot0\pndec }\ls1\adjustright \fs20\cgrid +#define {\b P7}\~ 7\par +} +{\pard\widctlpar\brdrb\brdrs\brdrw5\brsp20 \adjustright \par} +\pard\plain \s3\sb240\sa60\keepn\widctlpar\adjustright \b\f1\cgrid +Macro Definition Documentation\par +\pard\plain +{\xe \v DEBUG_PRINT\:PCF8574.h} +{\xe \v PCF8574.h\:DEBUG_PRINT} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +#define DEBUG_PRINT( {\i ...})\~ \{\}}} +\par +{\bkmkstart AAAAAAAAAC} +{\bkmkend AAAAAAAAAC} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v DEBUG_PRINTER\:PCF8574.h} +{\xe \v PCF8574.h\:DEBUG_PRINTER} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +#define DEBUG_PRINTER\~ Serial}} +\par +{\bkmkstart AAAAAAAAAD} +{\bkmkend AAAAAAAAAD} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v DEBUG_PRINTLN\:PCF8574.h} +{\xe \v PCF8574.h\:DEBUG_PRINTLN} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +#define DEBUG_PRINTLN( {\i ...})\~ \{\}}} +\par +{\bkmkstart AAAAAAAAAE} +{\bkmkend AAAAAAAAAE} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v P0\:PCF8574.h} +{\xe \v PCF8574.h\:P0} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +#define P0\~ 0}} +\par +{\bkmkstart AAAAAAAAAF} +{\bkmkend AAAAAAAAAF} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v P1\:PCF8574.h} +{\xe \v PCF8574.h\:P1} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +#define P1\~ 1}} +\par +{\bkmkstart AAAAAAAAAG} +{\bkmkend AAAAAAAAAG} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v P2\:PCF8574.h} +{\xe \v PCF8574.h\:P2} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +#define P2\~ 2}} +\par +{\bkmkstart AAAAAAAAAH} +{\bkmkend AAAAAAAAAH} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v P3\:PCF8574.h} +{\xe \v PCF8574.h\:P3} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +#define P3\~ 3}} +\par +{\bkmkstart AAAAAAAAAI} +{\bkmkend AAAAAAAAAI} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v P4\:PCF8574.h} +{\xe \v PCF8574.h\:P4} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +#define P4\~ 4}} +\par +{\bkmkstart AAAAAAAAAJ} +{\bkmkend AAAAAAAAAJ} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v P5\:PCF8574.h} +{\xe \v PCF8574.h\:P5} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +#define P5\~ 5}} +\par +{\bkmkstart AAAAAAAAAK} +{\bkmkend AAAAAAAAAK} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v P6\:PCF8574.h} +{\xe \v PCF8574.h\:P6} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +#define P6\~ 6}} +\par +{\bkmkstart AAAAAAAAAL} +{\bkmkend AAAAAAAAAL} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v P7\:PCF8574.h} +{\xe \v PCF8574.h\:P7} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +#define P7\~ 7}} +\par +{\bkmkstart AAAAAAAAAM} +{\bkmkend AAAAAAAAAM} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +{\xe \v READ_ELAPSED_TIME\:PCF8574.h} +{\xe \v PCF8574.h\:READ_ELAPSED_TIME} +\pard\plain \s4\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs20\cgrid { +{\b +#define READ_ELAPSED_TIME\~ 10}} +\par +{\bkmkstart AAAAAAAAAN} +{\bkmkend AAAAAAAAAN} +{ +\pard\plain \s51\li360\sa60\sb30\qj\widctlpar\qj\adjustright \fs20\cgrid +} +\par \pard\plain + +\pard\plain \sect\sbkpage +\s2\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs28\kerning28\cgrid +\pard\plain \s2\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs28\kerning28\cgrid +README.md File Reference\par \pard\plain +{\tc\tcl2 \v README.md} +{\xe \v README.md} +{\bkmkstart AAAAAAAAAO} +{\bkmkend AAAAAAAAAO} + +\pard\plain \sect\sbkpage +\s1\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs36\kerning36\cgrid +\s1\sb240\sa60\keepn\widctlpar\adjustright \b\f1\fs36\kerning36\cgrid Index\par +\pard\plain +{\tc \v Index} +{\field\fldedit {\*\fldinst INDEX \\c2 \\*MERGEFORMAT}{\fldrslt INDEX}} +} \ No newline at end of file diff --git a/keywords.txt b/keywords.txt index a952b0f..3b9e9d9 100644 --- a/keywords.txt +++ b/keywords.txt @@ -1,21 +1,21 @@ ########################################### -# Syntax Coloring Map For Thermistor-library +# Syntax Coloring Map For PCF8574-library ########################################### ########################################### # Datatypes (KEYWORD1) ########################################### -PCF8591 KEYWORD1 +PCF8574 KEYWORD1 ########################################### # Methods and Functions (KEYWORD2) ########################################### begin KEYWORD2 -AnalogInput KEYWORD2 -analogRead KEYWORD2 -analogWrite KEYWORD2 +pinMode KEYWORD2 -voltageWrite KEYWORD2 -voltageRead KEYWORD2 +readBuffer KEYWORD2 +digitalRead KEYWORD2 +digitalReadAll KEYWORD2 +digitalWrite KEYWORD2 diff --git a/library.properties b/library.properties index ef2794c..a7ece83 100644 --- a/library.properties +++ b/library.properties @@ -5,5 +5,5 @@ maintainer=Renzo Mischianti sentence=Arduino/ESP8266 library for PCF8574 paragraph=Arduino/ESP8266 library for PCF8574 category=Sensors -url=https://github.com/xreef/ +url=https://github.com/xreef/PCF8574_library architectures=*